InfiniNoC is a highly customizable Network-on-Chip (NoC) from InfiniNode Technologies, designed to provide a scalable, high-performance communication backbone for next-generation SoCs. It enables seamless integration of diverse IP blocks while delivering the flexibility, scalability, and performance required to accelerate complex chip development. The architecture supports high bandwidth and low latency alongside energy-efficient data movement, and it can be customized to match specific use cases and requirements.

Furthermore, InfiniNoC can be extended with: 

• Advanced cache coherency support: A scalable coherency technology, tested up to 128 cores and optimized for multi-chiplet architectures.

   

• Configurable system-level cache: It supports multiple variants—including high-performance, area/power-efficient, and data compression enabled (using compression engine from ZeroPoint Technologies)